SiliconBlue Secures $24 Million in Series-B Funding

NEA Leads Round to Support Pioneering Ultra Low Power FPGA Technology for Battery Powered Applications

SUNNYVALE, Calif. SiliconBlue™ Technologies, pioneer of a new Ultra Low Power FPGA (Field Programmable Gate Array) technology for consumer applications, today announced that it has secured Series-B equity funding in the amount of 24 million dollars. NEA (New Enterprise Associates) led this round of funding, with previous investors BlueRun Ventures and Crosslink Capital also participating.

SiliconBlue plans to use the funding to accelerate the next phase of the company’s growth by expanding sales operations globally to support new customers. SiliconBlue is the most capital-efficient startup, first funded in August 2006 with $16M venture capital that has delivered 65nm Ultra Low Power SRAM-based FPGA, proven NVCM (Non-volatile Configuration Memory) technology, fully functional software tools and the broadest range of IP for consumer handheld applications. These low cost FPGAs are reprogrammable from onboard proprietary NVCM, external flash or processor interface. 

“We are fortunate to have the backing of venture capital firms with many years of experience investing in semiconductors and growth markets,” said Kapil Shankar, CEO of SiliconBlue. “The support of our new investor NEA, and continued support of BlueRun Ventures and Crosslink Capital, is an important and inspiring vote of confidence from the VC community. Within a short period of three months we have over 70 customer engagements / tools installations. This funding will help us build our sales channel and drive revenue effectively.”

About SiliconBlue

SiliconBlue has built from ground up, the first single-chip, reprogrammable, ultra-low power FPGA optimized for handheld, mobile applications. While incumbents have focused on speed, density and features, SiliconBlue has set a new standard for price, power and space. Our low cost, non-volatile and reprogrammable FPGAs feature: operating power as low as 25 uW (typical); logic cell gate complexity unparalleled in existing low power PLDs; sizes as small as 3mm by 4mm. Samples, evaluation boards and software tools are available now.